/* HKW Elektronik GmBH Radio clock driver */
/* Author Lyndon David, Sentinet Ltd      */
/* (c) Feb 97                             */

/* The HKW clock module is a radio receiver tuned into the Rugby */
/* MSF time signal tranmitted on 60 kHz. The clock module connects */
/* to the computer via a serial line and transmits the time encoded */
/* in 15 bytes at 300 baud 7 bits two stop bits even parity */

/* Clock communications, from the datasheet */
/* All characters sent to the clock are echoed back to the controlling */
/* device. */
/* Transmit time/date information */
/* syntax ASCII o<cr> */
/* Character o may be replaced if neccesary by a character whoes code */
/* contains the lowest four bits f(hex) eg */
/* syntax binary: xxxx1111 00001101 */

/* The clock replies to this command with a sequence of 15 characters */
/* which contain the complete time and a final <cr> making 16 characters */
/* in total. */
/* The RC computer clock will not reply immediately to this command because */
/* the start bit edge of the first reply character marks the beginning of */
/* the second. So the RC Computer Clock will reply to this command at the */
/* start of the next second */
/* The characters have the following meaning */
/* 1. hours tens   */
/* 2. hours units  */
/* 3. minutes tens */
/* 4. minutes units */
/* 5. seconds tens  */
/* 6. seconds units */
/* 7. day of week 1-monday 7-sunday */
/* 8. day of month tens */
/* 9. day of month units */
/* 10. month tens */
/* 11. month units */
/* 12. year tens */
/* 13. year units */
/* 14. BST/UTC status */
/*	bit 7	parity */
/*	bit 6	always 0 */
/*	bit 5	always 1 */
/*	bit 4	always 1 */
/*	bit 3	always 0 */
/*	bit 2	=1 if UTC is in effect, complementary to the BST bit */
/*	bit 1	=1 if BST is in effect, according to the BST bit     */
/*	bit 0   BST/UTC change impending bit=1 in case of change impending */
/* 15. status */
/*	bit 7	parity */
/*	bit 6	always 0 */
/*	bit 5	always 1 */
/*	bit 4	always 1 */
/*	bit 3	=1 if low battery is detected */
/*	bit 2	=1 if the very last receptiion attempt failed and a valid */
/*		time information already exists (bit0=1) */
/*		=0 if the last reception attempt was successful */
/*	bit 1	=1 if at least one reception since 2:30 am was successful */
/*		=0 if no reception attempt since 2:30 am was successful */
/*	bit 0	=1 if the RC Computer Clock contains valid time information */
/*		This bit is zero after reset and one after the first */
/*		successful reception attempt */

#define _POSIX_SOURCE
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/uio.h>
#include <fcntl.h>
#include <termios.h>
#include <errno.h>
#include <unistd.h>

/* function prototypes */

int devopen(); /* open clock device and return device descriptor */